US 12,261,203 B2
Semiconductor device structure with gate stack and method for forming the same
Chien-Chih Lin, Taichung (TW); Yun-Ju Pan, Taipei (TW); Szu-Chi Yang, Hsinchu (TW); Jhih-Yang Yan, Hsinchu County (TW); Shih-Hao Lin, Hsinchu (TW); Chung-Shu Wu, Taoyuan (TW); Te-An Yu, Taipei (TW); and Shih-Chiang Chen, Taichung (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Jan. 19, 2022, as Appl. No. 17/578,559.
Claims priority of provisional application 63/255,640, filed on Oct. 14, 2021.
Prior Publication US 2023/0122339 A1, Apr. 20, 2023
Int. Cl. H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01)
CPC H01L 29/0665 (2013.01) [H01L 29/42392 (2013.01); H01L 29/66553 (2013.01); H01L 29/66742 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for forming a semiconductor device structure, comprising:
providing a substrate comprising a base and a fin structure over the base, wherein the fin structure comprises a multilayer stack, and the multilayer stack comprises a first nanostructure and a second nanostructure over the first nanostructure;
forming a first cladding layer over a first sidewall of the multilayer stack;
forming a gate stack over the multilayer stack and the first cladding layer;
partially removing the multilayer stack and the first cladding layer, wherein the first cladding layer is not covered by the gate stack; partially removing the first nanostructure and the first cladding layer from sidewalls of the first nanostructure and the first cladding layer to form a first recess, a second recess, and a plurality of third recesses, wherein the first recess is in the multilayer stack, the second recess is in the second nanostructure, and the plurality of third recesses are on opposite sides of the first cladding layer and surrounded by the first cladding layer, the gate stack, and the multilayer stack; and
forming a first inner spacer, a second inner spacer, and a plurality of third inner spacers respectively in the first recess, the second recess, and the plurality of third recesses, wherein
a sum of a first widths of a first one of the plurality of third inner spacers and a second width of a second one of the plurality of third inner spacers is greater than a third width of the first cladding layer as measured along a longitudinal axis of the fin structure.