| CPC H01L 29/0649 (2013.01) [H01L 27/0924 (2013.01); H01L 29/42376 (2013.01); H01L 29/4916 (2013.01); H01L 29/6656 (2013.01); H01L 29/6681 (2013.01); H01L 29/7851 (2013.01); H01L 21/76224 (2013.01); H01L 29/0653 (2013.01); H01L 29/66545 (2013.01)] | 20 Claims |

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1. A semiconductor device comprising:
a gate insulating support extending in a first direction;
first and second fin patterns aligned in the first direction and spaced apart from the gate insulating support in a second direction intersecting the first direction;
a third fin pattern between the first fin pattern and the second fin pattern;
a first element isolation structure extending in the second direction and disposed between the first fin pattern and the third fin pattern;
a second element isolation structure extending in the second direction between the second fin pattern and the third fin pattern; and
first and second gate structures spaced apart from the first and second element isolation structures, the gate insulating support being disposed between the first gate structure and the first element isolation structure and between the second gate structure and the second element isolation structure.
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