CPC H01L 27/0629 (2013.01) [H01L 21/823821 (2013.01); H01L 21/823864 (2013.01); H01L 29/66181 (2013.01); H01L 29/7851 (2013.01); H01L 29/94 (2013.01)] | 7 Claims |
1. A method for fabricating a semiconductor device, comprising:
providing a substrate having a first NMOS region, a first PMOS region, a second NMOS region, a second PMOS region, and a MOS capacitor region;
forming a fin NMOS transistor on the first NMOS region;
forming a fin PMOS transistor on the first PMOS region;
forming a planar NMOS transistor on the second NMOS region;
forming a planar PMOS transistor on the second PMOS region; and
forming a planar MOS capacitor on the MOS capacitor region.
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