US 12,261,142 B2
Semiconductor structure including thermal enhanced bonding structure
Chen-Hua Yu, Hsinchu (TW); Chun-Hui Yu, Hsinchu County (TW); Jeng-Nan Hung, Taichung (TW); Kuo-Chung Yee, Taoyuan (TW); and Po-Fan Lin, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Oct. 18, 2023, as Appl. No. 18/489,016.
Application 18/489,016 is a continuation of application No. 17/834,923, filed on Jun. 7, 2022, granted, now 11,830,844.
Application 17/834,923 is a continuation of application No. 16/935,175, filed on Jul. 21, 2020, granted, now 11,380,645, issued on Jul. 5, 2022.
Claims priority of provisional application 62/940,257, filed on Nov. 26, 2019.
Prior Publication US 2024/0047404 A1, Feb. 8, 2024
Int. Cl. H01L 23/00 (2006.01); H01L 23/48 (2006.01)
CPC H01L 24/20 (2013.01) [H01L 23/481 (2013.01); H01L 2224/2101 (2013.01); H01L 2224/214 (2013.01); H01L 2224/215 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A structure, comprising:
a first semiconductor die comprising:
a semiconductor substrate;
through vias penetrating through the semiconductor substrate;
an interconnect structure; and
a bonding structure, wherein the interconnect structure and the bonding structure are disposed on opposite surfaces of the semiconductor substrate, the bonding structure is electrically connected to the interconnect structure by the through vias, thermal conductivity of at least one dielectric layer of the bonding structure is greater than thermal conductivity of silicon dioxide.