| CPC H01L 23/562 (2013.01) [H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 23/535 (2013.01)] | 19 Claims |
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1. A semiconductor device comprising:
a pair of first wiring lines spaced apart from each other in a first direction;
a plurality of second wiring lines located over the pair of first wiring lines;
an interlayer insulating layer comprising a first portion and a second portion, wherein the first portion is located in a gap between second wiring lines that neighbor each other in the first direction and the second portion is located over the plurality of second wiring lines to insulate the plurality of second wiring lines from each other; and
a first auxiliary wiring line extending in the first direction and electrically coupling the pair of first wiring lines, wherein a first end of the first auxiliary wiring line contacts one of the pair of first wiring lines and a second end of the first auxiliary wiring line contacts the other one of the pair of first wiring lines,
wherein the first auxiliary wiring line overlaps the first portion of the interlayer insulating layer in a stacking direction, and the pair of first wiring lines do not overlap the first portion of the interlayer insulating layer in the stacking direction;
wherein heights of the second wiring lines are greater than heights of the first wiring lines; and
further comprising:
a gate structure including conductive layers and insulating layers that are alternately stacked; and
penetration structures extending through the gate structure,
wherein the pair of first wiring lines are electrically coupled to the penetration structures or the conductive layers through the auxiliary wiring line.
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