| CPC H01L 23/49562 (2013.01) [H01L 21/4835 (2013.01); H01L 21/4842 (2013.01); H01L 23/49565 (2013.01); H01L 23/49582 (2013.01); H01L 23/49513 (2013.01); H01L 24/40 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 2224/40245 (2013.01); H01L 2224/48245 (2013.01); H01L 2224/73221 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/182 (2013.01)] | 13 Claims |

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1. A semiconductor package comprising:
a lead frame comprising
a die paddle comprising
a first portion;
a second portion electrically isolated from the first portion; and
a third portion electrically isolated from the first portion and the second portion;
a first plurality of leads extending from the first portion of the die paddle along a first direction;
a first tie bar extending from the first portion of the die paddle along a second direction perpendicular to the first direction;
a second tie bar extending from the first portion of the die paddle along a third direction opposite the second direction;
a third tie bar extending from the second portion of the die paddle along the third direction; and
a semiconductor chip attached to the die paddle of the lead frame; and
a molding encapsulation enclosing the chip;
wherein a respective end surface of each lead of the first plurality of leads is plated with a metal; and
wherein a respective end surface of each of the first tie bar, the second tie bar, and the third tie bar is not plated with the metal.
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