US 12,261,099 B2
Embedded cooling systems with coolant channel for device packaging
Guilian Gao, Campbell, CA (US); Belgacem Haba, Saratoga, CA (US); and Laura Mirkarimi, Sunol, CA (US)
Assigned to Adeia Semiconductor Bonding Technologies Inc., San Jose, CA (US)
Filed by Adeia Semiconductor Bonding Technologies Inc., San Jose, CA (US)
Filed on Dec. 22, 2023, as Appl. No. 18/394,985.
Claims priority of provisional application 63/435,145, filed on Dec. 23, 2022.
Prior Publication US 2024/0249998 A1, Jul. 25, 2024
Int. Cl. H01L 23/46 (2006.01); H01L 23/00 (2006.01); H01L 23/053 (2006.01); H01L 23/38 (2006.01)
CPC H01L 23/46 (2013.01) [H01L 23/053 (2013.01); H01L 23/38 (2013.01); H01L 24/08 (2013.01); H01L 2224/08245 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device package comprising:
a package substrate;
a package cover disposed on the package substrate;
an integrated cooling assembly disposed between the package substrate and the package cover, the integrated cooling assembly comprising a semiconductor device and a cold plate, the cold plate comprising a first side attached to the semiconductor device and a second side opposite the first side, wherein the cold plate is attached to the semiconductor device by direct dielectric bonds; and
an adhesive layer disposed between the package cover and the second side of the cold plate, wherein:
one or more surfaces of the second side of the cold plate are spaced apart from the package cover to define a coolant channel therebetween;
the adhesive layer comprises a first portion that seals the package cover to the cold plate around a perimeter of the coolant channel and a second portion disposed inward of the perimeter of the coolant channel; and
the second portion of the adhesive layer attaches inner surfaces of the cold plate to the corresponding portions of the package cover disposed thereover.