CPC H01L 21/76849 (2013.01) [H01L 21/76805 (2013.01); H01L 21/7684 (2013.01); H01L 21/76846 (2013.01); H01L 21/76871 (2013.01); H01L 21/76895 (2013.01); H01L 23/535 (2013.01)] | 20 Claims |
1. A method, comprising:
forming a first conductive structure in a first dielectric layer on a substrate;
depositing a second dielectric layer on the first conductive structure and the first dielectric layer;
forming an opening in the second dielectric layer to expose the first conductive structure and a portion of the first dielectric layer;
forming a nitrided layer by performing a nitridation treatment to a top portion of the exposed first conductive structure, a top portion of the portion of the first dielectric layer, sidewalls of the opening, and a top portion of the second dielectric layer; and
forming a second conductive structure in the opening, wherein the second conductive structure is in contact with the nitrided layer.
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11. A method, comprising:
forming a transistor structure on a substrate;
forming a metal via in a first dielectric layer disposed on the transistor structure;
forming a nitrided layer including a nitrided metal layer and a nitrided dielectric layer on a top portion of the metal via and a top portion of the first dielectric layer, respectively;
depositing a second dielectric layer on the nitrided layer;
forming an opening in the second dielectric layer to expose the nitrided metal layer; and
forming a metal line in the opening, wherein the metal line is in contact with the nitrided metal layer.
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17. A method, comprising:
depositing a dielectric layer on a substrate;
forming a metal line opening in the dielectric layer to expose a conductive via contact;
nitriding a top portion of the exposed conductive via contact, a dielectric sidewall of the metal line opening, and a top portion of the dielectric layer; and
forming a metal line in the metal line opening.
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