| CPC H01L 21/02362 (2013.01) [H01L 21/02164 (2013.01); H01L 21/0217 (2013.01); H01L 21/02532 (2013.01); H01L 21/324 (2013.01); H01L 21/76224 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01)] | 20 Claims |

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1. A device comprising:
a bulk semiconductor substrate;
an isolation region extending into the bulk semiconductor substrate, wherein the isolation region comprises:
a dielectric barrier layer comprising silicon and nitrogen; and
an oxide layer on the dielectric barrier layer;
a semiconductor fin protruding higher than a top surface of the dielectric barrier layer; and
a semiconductor strip overlapped by the semiconductor fin, wherein the semiconductor strip is in contact with the dielectric barrier layer, wherein the dielectric barrier layer forms a first interface with the semiconductor strip, and a second interface with the oxide layer, wherein the dielectric barrier layer has a peak nitrogen atomic percentage at an intermediate position between the first interface and the second interface, and wherein first topmost points of the first interface, the second interface, and the peak nitrogen atomic percentages are lower than a second topmost point of the semiconductor fin.
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