US 12,260,933 B2
Data receiving circuit, data receiving system, and memory device
Feng Lin, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Jan. 11, 2023, as Appl. No. 18/152,919.
Application 18/152,919 is a continuation of application No. PCT/CN2022/115546, filed on Aug. 29, 2022.
Claims priority of application No. 202210725117.0 (CN), filed on Jun. 23, 2022.
Prior Publication US 2023/0420019 A1, Dec. 28, 2023
Int. Cl. G11C 7/22 (2006.01); G11C 5/14 (2006.01); G11C 7/10 (2006.01)
CPC G11C 7/222 (2013.01) [G11C 5/147 (2013.01); G11C 7/1063 (2013.01)] 23 Claims
OG exemplary drawing
 
1. A data receiving circuit, comprising:
a receiving module, configured to receive a data signal and a reference signal, compare the data signal and the reference signal in response to a sampling clock signal, and output a first output signal and a second output signal; and
a decision feedback equalization module, connected to a feedback node of the receiving module, and configured to perform a decision feedback equalization on the receiving module on the basis of a feedback signal to adjust the first output signal and the second output signal, wherein the feedback signal is obtained on the basis of data received previously, and an adjustment capability of the decision feedback equalization module to the first output signal and the second output signal is adjustable; and,
wherein the receiving module comprises:
a first amplification module, configured to receive the data signal and the reference signal, compare the data signal and the reference signal in response to the sampling clock signal, output a first voltage signal through a first node, and output a second voltage signal through a second node;
a second amplification module, connected to the first node and the second node, and configured to amplify a voltage difference between the first voltage signal and the second voltage signal, output the first output signal through a third node, and output the second output signal through a fourth node; and
the feedback node comprises a first feedback node and a second feedback node, the first node serves as the first feedback node, the second node serves as the second feedback node, and the decision feedback equalization module is configured to perform the decision feedback equalization on the first node and the second node on the basis of the feedback signal to adjust the first voltage signal and the second voltage signal.