US 12,260,915 B2
Non-volatile memory device with parallel programming
Seong Jun Park, Suwon-si (KR); Jong Min Cho, Yangpyeong-gun (KR); Sung Bum Park, Seongnam-si (KR); and Kee Sik Ahn, Hwaseong-si (KR)
Assigned to SK keyfoundry Inc., Cheongju-si (KR)
Filed by SK keyfoundry Inc., Cheongju-si (KR)
Filed on Mar. 14, 2022, as Appl. No. 17/693,700.
Claims priority of application No. 10-2021-0132541 (KR), filed on Oct. 6, 2021.
Prior Publication US 2023/0107619 A1, Apr. 6, 2023
Int. Cl. G11C 16/26 (2006.01); G11C 16/04 (2006.01); G11C 16/08 (2006.01); G11C 16/10 (2006.01); G11C 16/30 (2006.01); G11C 17/16 (2006.01)
CPC G11C 16/102 (2013.01) [G11C 16/0433 (2013.01); G11C 16/08 (2013.01); G11C 16/26 (2013.01); G11C 16/30 (2013.01); G11C 17/16 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A non-volatile memory device, comprising:
a first fuse cell array and a second fuse cell array, spaced from each other;
a ground ring region comprising a first ground ring region and a second ground ring region disposed to surround the first fuse cell array and the second fuse cell array, respectively;
a ground ring connection region configured to connect the first ground ring region and the second ground ring region;
a power ring region disposed to surround the first ground ring region and the second ground ring region, and disposed between the first fuse cell array and the second fuse cell array, the power ring region being configured to supply a power voltage to the first fuse cell array and the second fuse cell array;
a first decoupling power capacitor disposed in at least one of the first or second ground ring regions;
a second decoupling power capacitor disposed in the power ring region;
an address decoder, disposed between the first fuse cell array and the second fuse cell array and configured to supply a word line signal to each of the first fuse cell array and the second fuse cell array; and
a sense amplifier disposed at a bottom of each fuse cell array,
wherein the sense amplifier, the ground ring region, and the power ring region are disposed at the bottom of each fuse cell array in this order,
wherein the ground ring region overlaps the first decoupling power capacitor, and the power ring region overlaps the second decoupling power capacitor, and
wherein the first ground ring region, the second ground ring region, and the ground ring connection region supply a ground voltage to the first fuse cell array and the second fuse cell array.