US 12,260,911 B2
Memory circuit structure and method of operating memory circuit structure
Xiaoxin Xu, Beijing (CN); Jie Yu, Beijing (CN); Danian Dong, Beijing (CN); Zhaoan Yu, Beijing (CN); and Hangbing Lv, Beijing (CN)
Assigned to INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES, Beijing (CN)
Appl. No. 18/247,213
Filed by INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES, Beijing (CN)
PCT Filed Jan. 25, 2021, PCT No. PCT/CN2021/073533
§ 371(c)(1), (2) Date Mar. 29, 2023,
PCT Pub. No. WO2022/068125, PCT Pub. Date Apr. 7, 2022.
Claims priority of application No. 202011069953.5 (CN), filed on Sep. 30, 2020.
Prior Publication US 2023/0368838 A1, Nov. 16, 2023
Int. Cl. G11C 13/00 (2006.01)
CPC G11C 13/0069 (2013.01) [G11C 13/0023 (2013.01); G11C 13/0064 (2013.01); G11C 2013/0066 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A memory circuit structure, comprising:
a storage array, wherein the storage array comprises at least two storage units;
a decoder connected with a bit line and a word line of the storage array, and configured to select a specific storage unit in a specific row and a specific column for operation;
a programming circuit configured to generate a voltage pulse or a constant current pulse;
a polarity switching circuit connected with the programming circuit, and configured to implement a switching between a voltage programming and a current programming of the programming circuit under a set operation and a reset operation;
a detection circuit connected with the storage array, and configured to detect a detection signal of a current or a voltage corresponding to the specific storage unit in the storage array and feed back the detection signal to a control unit, wherein the detection signal output by the detection circuit is configured to enable the polarity switching circuit to switch; and
the control unit configured to, according to the detection signal, control the polarity switching circuit to perform a switching operation and control a pulse output of the programming circuit.