CPC G11C 11/54 (2013.01) [G06F 18/21345 (2023.01); G06N 3/08 (2013.01); G11C 11/4087 (2013.01); G06F 18/21326 (2023.01)] | 10 Claims |
1. A hardware/software co-compressed computing method for a static random access memory (SRAM) computing-in-memory-based (CIM-based) processing unit, which is configured to compute an input feature data group to generate an output feature data group, the hardware/software co-compressed computing method for the SRAM CIM-based processing unit comprising:
performing a data dividing step to drive a processing unit to divide a plurality of kernels corresponding to the input feature data group into a plurality of weight groups;
performing a sparsity step comprising:
performing a weight setting step to drive the processing unit to set each of the weight groups to one of a zero weight group and a non-zero weight group according to a sparsity aware computing method;
performing an address assigning step to drive a computing device to assign a plurality of index codes to a plurality of the non-zero weight groups of the kernels, respectively, and transmit the non-zero weight groups to the SRAM CIM-based processing unit; and
performing a hardware decoding and calculating step to drive the SRAM CIM-based processing unit to execute an inner product to the non-zero weight groups and the input feature data group corresponding to the non-zero weight groups to generate the output feature data group;
wherein the index codes corresponding to the non-zero weight groups of one of the kernels are the same as the index codes corresponding to the non-zero weight groups of another one of the kernels, respectively.
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