US 12,260,836 B2
Pixel circuit, method for controlling pixel and display device
Guangchen Zhang, Shenzhen (CN); Tingting Shen, Shenzhen (CN); Li Lv, Shenzhen (CN); Yunyang Liu, Shenzhen (CN); Zhiwei Li, Shenzhen (CN); Jie Wang, Shenzhen (CN); and Baohong Kang, Shenzhen (CN)
Assigned to HKC CORPORATION LIMITED, Shenzhen (CN)
Filed by HKC CORPORATION LIMITED, Shenzhen (CN)
Filed on Aug. 4, 2023, as Appl. No. 18/365,871.
Claims priority of application No. 202211688066.5 (CN), filed on Dec. 28, 2022.
Prior Publication US 2024/0221699 A1, Jul. 4, 2024
Int. Cl. G09G 3/36 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01)
CPC G09G 3/3614 (2013.01) [G02F 1/136286 (2013.01); G02F 1/1368 (2013.01); G09G 3/3648 (2013.01); G09G 3/3655 (2013.01); G09G 2300/0852 (2013.01); G09G 2320/0233 (2013.01)] 5 Claims
OG exemplary drawing
 
1. A pixel circuit, applied to a display panel, the display panel comprising: a scan line, a data line, a first pixel, and a second pixel, the first pixel comprising a first pixel electrode, and the second pixel comprising a second pixel electrode,
wherein the pixel circuit comprises:
a first thin film transistor, wherein a controlled end of the first thin film transistor is connected to the scan line, and an input end of the first thin film transistor is connected to the data line; and
a first selection circuit, wherein an input end of the first selection circuit is connected to an output end of the first thin film transistor, the first output end of the first selection circuit is connected to the first pixel electrode, and a second output end of the first selection circuit is connected to the second pixel electrode,
wherein the first thin film transistor is configured to sequentially write a data signal transmitted on the data line into the first pixel and the second pixel through the first selection circuit according to a scanning signal transmitted on the scan line, to charge the first pixel and the second pixel sequentially, so that the first pixel and the second pixel are sequentially charged to a corresponding pixel electric potential of a current frame;
wherein the first selection circuit comprises:
a first unidirectional circuit, wherein a first end of the first unidirectional circuit is connected to the output end of the first thin film transistor, and a second end of the first unidirectional circuit is connected to the first pixel electrode; and
a second unidirectional circuit, wherein a first end of the second unidirectional circuit is connected to the output end of the first thin film transistor, and a second end of the second unidirectional circuit is connected to the second pixel electrode,
wherein in response to that the first thin film transistor outputs a data signal, one of the first unidirectional circuit or the second unidirectional circuit is conducted, the other of the first unidirectional circuit or the second unidirectional circuit is turned off, and a conducting current direction of the first unidirectional circuit is opposite to a conducting current direction of the second unidirectional circuit;
wherein the pixel circuit comprises a reset circuit,
a controlled end of the reset circuit is connected to a previous preset row scan line, an input end of the reset circuit is configured to access a preset reset electric potential, a first output end of the reset circuit is connected to the first pixel electrode, and a second output end of the reset circuit is connected to the second pixel electrode, and
the reset circuit is configured to output the preset reset electric potential to the first pixel electrode and the second pixel electrode according to a scan signal transmitted on the previous preset row scan line, so as to reset the first pixel and the second pixel;
wherein the pixel circuit further comprises a second selection circuit,
wherein a first input end of the second selection circuit is connected to the first output end of the reset circuit, a second input end of the second selection circuit is connected to the second output end of the reset circuit, a first output end of the second selection circuit is connected to the first pixel electrode, and a second output end of the second selection circuit is connected to the second pixel electrode;
wherein the second selection circuit comprises:
a third unidirectional circuit, wherein a first end of the third unidirectional circuit is connected to the first pixel electrode, and a second end of the third unidirectional circuit is connected to the first output end of the reset circuit; and
a fourth unidirectional circuit, wherein a first end of the fourth unidirectional circuit is connected to the second pixel electrode, and a second end of the fourth unidirectional circuit is connected to the second output end of the reset circuit,
wherein in response to that the reset circuit is conducted, both the first unidirectional circuit and the second unidirectional circuit are conducted, and a conducting current direction of the third unidirectional circuit is the same as the conducting current direction of the first unidirectional circuit, and a conducting current direction of the fourth unidirectional circuit is the same as the conducting current direction of the second unidirectional circuit.