US 12,260,829 B2
Data driving circuit and display device having the same
Yoosung Kim, Yongin-si (KR); and Hyunho Lim, Yongin-si (KR)
Assigned to Samsung Display Co., Ltd., Yongin-Si (KR)
Filed by Samsung Display Co., Ltd., Yongin-Si (KR)
Filed on Feb. 6, 2024, as Appl. No. 18/433,453.
Claims priority of application No. 10-2023-0074058 (KR), filed on Jun. 9, 2023.
Prior Publication US 2024/0412698 A1, Dec. 12, 2024
Int. Cl. G09G 3/3275 (2016.01)
CPC G09G 3/3275 (2013.01) [G09G 2310/0243 (2013.01); G09G 2310/0289 (2013.01); G09G 2310/0291 (2013.01); G09G 2320/02 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A data driving circuit comprising:
a latch circuit configured to latch a data signal in response to a latch enable signal and to output a first signal;
a level shifter configured to output a second signal obtained by changing a voltage level of the first signal;
a digital-analog converter configured to output a third signal obtained by converting the second signal into an analog signal;
an amplifier configured to output a fourth signal obtained by amplifying the third signal;
a switch configured to output the fourth signal in a form of an image signal, in response to an output enable signal; and
a signal generator configured to generate the latch enable signal including an active duration and the output enable signal including an inactive duration,
wherein the signal generator outputs a start timing of the active duration of the latch enable signal, such that the active duration of the latch enable signal starts after the inactive duration of the output enable signal starts.