| CPC G09G 3/3233 (2013.01) [G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/0247 (2013.01); G09G 2330/021 (2013.01); G09G 2340/0435 (2013.01)] | 18 Claims |

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1. A pixel circuit, comprising:
a light emitting device;
a driving transistor configured to produce a current for driving the light emitting device to emit light according to a data voltage;
a voltage control circuit coupled to the driving transistor, wherein the voltage control circuit is configured to reset the driving transistor and input the data voltage in response to a loaded signal; and
a light emitting control circuit coupled to the driving transistor and the light emitting device, wherein the light emitting control circuit is configured to provide the current produced by the driving transistor to the light emitting device, wherein
a frequency of resetting the driving transistor is not less than a frequency of inputting the data voltage;
wherein the voltage control circuit is further configured to provide a fixed voltage loaded by a data signal end to the driving transistor in response to a signal loaded by a first control signal end, reset the driving transistor and provide a data voltage loaded by the data signal end to the driving transistor in response to signals loaded by the first control signal end and a second control signal end;
wherein the voltage control circuit comprises: a first transistor, a second transistor and a storage capacitor;
a gate of the first transistor is coupled to the first control signal end, a first electrode of the first transistor is coupled to the data signal end, and a second electrode of the first transistor is coupled to a second electrode of the driving transistor;
a gate of the second transistor is coupled to the second control signal end, a first electrode of the second transistor is coupled to a gate of the driving transistor, and a second electrode of the second transistor is coupled to a first electrode of the driving transistor; and
a first electrode plate of the storage capacitor is coupled to a first power end, and a second electrode plate of the storage capacitor is coupled to the gate of the driving transistor.
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