US 12,260,810 B1
Pixel driving circuit, driving method for pixel driving circuit, and display panel
Maoxia Zhu, Guangdong (CN)
Assigned to Guangzhou China Star Optoelectronics Semiconductor Display Technology Co., Ltd., Guangzhou (CN)
Filed by Guangzhou China Star Optoelectronics Semiconductor Display Technology Co., LTd., Guangdong (CN)
Filed on Nov. 16, 2023, as Appl. No. 18/511,707.
Claims priority of application No. 202311227414.3 (CN), filed on Sep. 21, 2023.
Int. Cl. G09G 3/32 (2016.01)
CPC G09G 3/32 (2013.01) [G09G 2300/0426 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0852 (2013.01); G09G 2320/043 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A pixel driving circuit, comprising:
a writing module electrically connected to a data signal terminal, and electrically connected to a first node and a second node, wherein the writing module is configured to connect the data signal terminal to one of the first node and the second node and disconnect the data signal terminal from another of the first node and the second node, or to disconnect the data signal terminal from the first node and the second node, or connect the data signal terminal to both the first node and the second node;
a driving transistor, wherein the driving transistor is a double-gate transistor, a first gate of the driving transistor is electrically connected to the first node, a second gate of the driving transistor is electrically connected to the second node, a source of the driving transistor is electrically connected to a first power signal terminal, a drain of the driving transistor is electrically connected to a third node, and the driving transistor is configured to connect the first power signal terminal and the third node, or to disconnect the first power signal terminal from the third node; and
a light-emitting element electrically connected to a second power signal terminal, and electrically connected to the third node;
wherein in any one frame period, one of the first gate and the second gate is controlled by a data signal output by the data signal terminal to turn on the driving transistor; and in a plurality of frame periods, the first gate and the second gate are alternately controlled by the data signal to turn on the driving transistor;
wherein the writing module comprises:
a first transistor, wherein a gate of the first transistor is electrically connected to a first scan signal terminal, a source of the first transistor is electrically connected to the data signal terminal, and a drain of the first transistor is electrically connected to the first node; and
a second transistor, wherein a gate of the second transistor is electrically connected to a second scan signal terminal, a source of the second transistor is electrically connected to the data signal terminal, and a drain of the second transistor is electrically connected to the second node;
wherein the pixel driving circuit further comprises a reset module, and the reset module comprises:
a first capacitor, wherein a first electrode of the first capacitor is electrically connected to the first power signal terminal, and a second electrode of the first capacitor is electrically connected to the third node; and
a third transistor, wherein a gate of the third transistor is electrically connected to a third scan signal terminal, a source of the third transistor is electrically connected to a sensing signal terminal, and a drain of the third transistor is electrically connected to the third node.