US 12,260,809 B2
Display panels including gate driving circuit and display devices including the same
Huanxi Zhang, Hubei (CN)
Assigned to Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd., Wuhan (CN)
Filed by Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd., Hubei (CN)
Filed on Jun. 29, 2023, as Appl. No. 18/215,933.
Application 18/215,933 is a continuation of application No. PCT/CN2023/088976, filed on Apr. 18, 2023.
Claims priority of application No. 202310317021.5 (CN), filed on Mar. 28, 2023.
Prior Publication US 2024/0321179 A1, Sep. 26, 2024
Int. Cl. G09G 3/3266 (2016.01); G09G 3/32 (2016.01)
CPC G09G 3/32 (2013.01) [G09G 3/3266 (2013.01); G09G 2300/0426 (2013.01); G09G 2310/0267 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/0247 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A display panel, comprising a display area and a non-display area, the display area including a first display partition and a second display partition arranged in a first direction,
wherein, the display panel further comprises:
a substrate;
a plurality of pixel driving circuits disposed on a side of the substrate and located in the display area;
a gate driving circuit disposed on a side of the substrate and located in the non-display area on both sides of the display area in the first direction; and
a plurality of scanning lines disposed on a side of the substrate, wherein the gate driving circuit is electrically connected to the pixel driving circuits in the same first direction as corresponding one of the scanning lines via the corresponding scanning line;
wherein the gate driving circuit is configured to, in a same frame, transmit a first group of gate driving signals corresponding to a first refresh frequency to ones of the pixel driving circuits in the first display partition and transmit a second group of gate driving signals corresponding to a second refresh frequency to ones of the pixel driving circuits in the second display partition, the first refresh frequency being greater than the second refresh frequency;
wherein the gate driving circuit comprises:
a light emission driving sub-circuit electrically connected to the pixel driving circuits in the same first direction as corresponding one of the scanning lines via the corresponding scanning line and configured to transmit a light emission control signal corresponding to a third refresh frequency to the corresponding pixel driving circuits in the display area, the third refresh frequency being greater than or equal to the first refresh frequency;
a first gate driving sub-circuit electrically connected to the pixel driving circuits in the same first direction as corresponding one of the scanning lines and located in the first display partition via the corresponding scanning line and configured to transmit the first group of gate driving signals to the ones of the pixel driving circuits in the first display partition; and
a second gate driving sub-circuit electrically connected to the pixel driving circuits in the same first direction as corresponding one of the scanning lines and located in the second display partition via the corresponding scanning line and configured to transmit the second group of gate driving signals to the ones of the pixel driving circuits in the second display partition;
wherein the first gate driving sub-circuit comprises:
a first positive gate driving sub-circuit electrically connected to the pixel driving circuits in the same first direction as corresponding one of the scanning lines and located in the first display partition via the corresponding scanning line and configured to transmit a first positive gate driving signal corresponding to the first refresh frequency to the ones of the pixel driving circuits in the first display partition; and
a first negative gate driving sub-circuit electrically connected to pixel driving circuits in the same first direction as corresponding one of the scanning lines and located in the first display partition via the corresponding scanning line and configured to transmit a first negative gate driving signal corresponding to the first refresh frequency to the ones of the pixel driving circuits in the first display partition;
wherein the second gate driving sub-circuit comprises:
a second positive gate driving sub-circuit electrically connected to the pixel driving circuits in the same first direction as corresponding one of the scanning lines and located in the second display partition via the corresponding scanning line and configured to transmit a second positive gate driving signal corresponding to the second refresh frequency to the ones of the pixel driving circuits in the second display partition; and
a second negative gate driving sub-circuit electrically connected to the pixel driving circuits in the same first direction as corresponding one of the scanning lines and located in the second display partition via the corresponding scanning line and configured to transmit a second negative gate driving signal corresponding to the second refresh frequency to the ones of the pixel driving circuits in the second display partition;
wherein the display area further comprises a third display partition arranged on a side of the second display partition away from the first display partition in the first direction; and
wherein the gate driving circuit is further configured to, in the same frame, transmit a third group of gate driving signals corresponding to a fourth refresh frequency to ones of the pixel driving circuits in the third display partition, the fourth refresh frequency being less than the second refresh frequency.