| CPC G09G 3/006 (2013.01) [H10K 59/1213 (2023.02); H10K 59/131 (2023.02)] | 18 Claims |

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1. A display device comprising:
a display layer comprising an active area in which a plurality of pixels is arranged and a peripheral area located adjacent to the active area,
the display layer comprising:
a transistor disposed in the active area and comprising a gate, a source, and a drain;
a first crack line disposed in the peripheral area on a same layer as the gate and surrounding a portion of the active area in a plan view; and
a second crack line disposed in the peripheral area under the first crack line to overlap the first crack line in the plan view,
wherein the first crack line is insulated from the second crack line.
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