US 12,260,511 B2
Front-end scaler circuit for processing demosaiced image data
Sarvesh Swami, San Jose, CA (US); David R Pope, Campbell, CA (US); and Sheng Lin, San Jose, CA (US)
Assigned to APPLE INC., Cupertino, CA (US)
Filed by Apple Inc., Cupertino, CA (US)
Filed on Jan. 18, 2022, as Appl. No. 17/578,195.
Prior Publication US 2023/0230200 A1, Jul. 20, 2023
Int. Cl. G06T 3/4015 (2024.01); G06T 5/50 (2006.01); G06T 5/70 (2024.01)
CPC G06T 3/4015 (2013.01) [G06T 5/50 (2013.01); G06T 5/70 (2024.01); G06T 2207/20212 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus for processing demosaiced image data, comprising:
an image space conversion circuit configured to convert input image data derived from raw image data into converted image data comprising luminance data and chrominance data;
a luminance pre-processing circuit coupled to the image space conversion circuit and configured to:
generate a first version of the luminance data associated with a first direction;
generate a second version of the luminance data associated with a second direction that is different than the first direction;
perform one or more first noise reduction operations on the first version of the luminance data to generate first noise-reduced luminance data;
perform one or more second noise reduction operations on the second version of the luminance data to generate second noise-reduced luminance data; and
combine the first noise-reduced luminance data and the second noise-reduced luminance data to generate processed luminance data;
a chroma processing circuit coupled to the image space conversion circuit and configured to perform one or more chrominance suppression functions on at least a portion of the chrominance data to generate processed chrominance data; and
a second image space conversion circuit configured to receive the processed luminance data and processed chrominance data, and convert the processed luminance data and processed chrominance data into processed image data.