US 12,260,322 B2
Technology for lowering instantaneous power consumption of neural processing unit
Lok Won Kim, Yongin-si (KR); Jung Boo Park, Seoul (KR); and Seong Jin Lee, Seongnam-si (KR)
Assigned to DEEPX CO., LTD., Seongnam-si (KR)
Filed by DEEPX CO., LTD., Seongnam-si (KR)
Filed on Oct. 2, 2023, as Appl. No. 18/479,161.
Application 18/479,161 is a continuation of application No. 18/353,404, filed on Jul. 17, 2023, granted, now 11,893,477.
Claims priority of application No. 10-2023-0061416 (KR), filed on May 12, 2023.
Prior Publication US 2024/0378431 A1, Nov. 14, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06N 3/063 (2023.01)
CPC G06N 3/063 (2013.01) 18 Claims
OG exemplary drawing
 
1. A system comprising:
a first circuit arranged for a first neural processing unit (NPU); and
a second circuit arranged for a second NPU,
wherein each of the first and second NPUs comprises at least one memory and a plurality of processing elements (PEs) capable of performing operations for at least one artificial neural network (ANN) model,
wherein the plurality of PEs include an adder, a multiplier, and an accumulator,
wherein the first NPU is configured to operate on a first portion of a clock signal,
wherein the second NPU is configured to operate on a second portion of the clock signal, and
wherein a reference phase of the second NPU is switchable from the second portion to the first portion of the clock signal.