US 12,260,316 B2
Automatic timing resolution among neural network components
Pallab Datta, San Jose, CA (US); Myron D. Flickner, San Jose, CA (US); and Dharmendra S. Modha, San Jose, CA (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by International Business Machines Corporation, Armonk, NY (US)
Filed on Sep. 20, 2017, as Appl. No. 15/709,699.
Prior Publication US 2019/0087714 A1, Mar. 21, 2019
Int. Cl. G06N 3/063 (2023.01); G06N 3/049 (2023.01)
CPC G06N 3/063 (2013.01) [G06N 3/049 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for resolving timing requirements among components of a neurosynaptic system, the method comprising:
identifying a set of neurosynaptic cores to be included in a neurosynaptic system, wherein each neurosynaptic core in the set of neurosynaptic cores is associated with one or more local inputs and one or more local outputs and wherein the neurosynaptic system adheres to a directed acyclic graph (DAG);
determining a prespecified timing requirement for each neurosynaptic core, wherein:
at least some of the neurosynaptic cores have a prespecified relative timing dependency between its respective local inputs; and
at least some of the neurosynaptic cores are mutable, wherein each mutable neurosynaptic core comprises one or more local inputs and one or more local outputs and wherein the prespecified timing of the one or more local outputs is adjustable relative to a timing of the one or more local inputs;
computing a topological order for the set of neurosynaptic cores using the DAG;
computing a relative timing for each neurosynaptic core using the prespecified timing requirements and the DAG;
enumerating through dependencies of each of the set of neurosynaptic cores in the computed topological order to identify any violated prespecified relative timing dependencies between each component's respective local inputs, and in response:
identifying at least one of the mutable neurosynaptic cores from the set of neurosynaptic cores; and
adjusting the relative timing of one or more local outputs relative to one or more local inputs of the identified at least one of the mutable neurosynaptic cores to resolve the violated prespecified relative timing dependencies.