US 12,260,220 B2
Accelerating fetch target queue (FTQ) processing in a processor
Saransh Jain, Raleigh, NC (US); Rami Mohammad Al Sheikh, Morrisville, NC (US); Daren Eugene Streett, Cary, NC (US); Michael Scott McIlvaine, Raleigh, NC (US); and Somasundaram Arunachalam, Raleigh, NC (US)
Assigned to Microsoft Technology Licensing, LLC, Redmond, WA (US)
Filed by Microsoft Technology Licensing, LLC, Redmond, WA (US)
Filed on Dec. 16, 2022, as Appl. No. 18/083,249.
Prior Publication US 2024/0201999 A1, Jun. 20, 2024
Int. Cl. G06F 9/38 (2018.01)
CPC G06F 9/3806 (2013.01) [G06F 9/3802 (2013.01); G06F 9/3808 (2013.01); G06F 9/3814 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A processor, comprising a fetch target queue (FTQ) and an FTQ acceleration cache (FAC);
the processor configured to:
generate, using the FAC, a FAC entry uniquely corresponding to an FTQ entry of a plurality of FTQ entries of the FTQ, wherein:
the FTQ entry comprises a fetch address bundle comprising a plurality of sequential virtual addresses (VAs);
the FAC entry comprises metadata for the FTQ entry; and
the FAC entry is virtually indexed and virtually tagged using an ordinal first VA of the plurality of sequential VAs of the FTQ entry;
receive, using the FTQ, a request to access the FTQ entry; and
responsive to receiving the request to access the FTQ entry:
locate, using the FAC, the FAC entry corresponding to the FTQ entry among a plurality of FAC entries of the FAC; and
perform accelerated processing of the request to access the FTQ entry using the metadata of the FAC entry.