US 12,260,217 B2
Using renamed registers to support multiple vset{i}vl{i} instructions
Josh Smith, San Francisco, CA (US)
Assigned to SiFive, Inc., Santa Clara, CA (US)
Filed by SiFive, Inc., San Mateo, CA (US)
Filed on Mar. 1, 2023, as Appl. No. 18/115,970.
Claims priority of provisional application 63/429,681, filed on Dec. 2, 2022.
Prior Publication US 2024/0184583 A1, Jun. 6, 2024
Int. Cl. G06F 9/30 (2018.01); G06F 9/38 (2018.01)
CPC G06F 9/30101 (2013.01) [G06F 9/30145 (2013.01); G06F 9/384 (2013.01); G06F 9/3856 (2023.08)] 16 Claims
OG exemplary drawing
 
1. A method for renaming architectural register, comprising:
decoding one or more instructions in a pipeline, wherein the one or more instructions update a control and status register (CSR), wherein the one or more instructions are of a same type, and the CSR includes a first register and a second register;
updating values in the CSR based on a respective instruction of the one or more instructions;
allocating one or more tags to the respective instruction in the pipeline,
wherein the one or more tags identify the CSR included in or associated with the one or more instructions or the updated values of the CSR, and
wherein each of the one or more tags is associated with a unique value; and
writing, for renaming the CSR, values of the first register and the second register into a mapping table as one combined unit such that the values of the first register and the second register are reduced to a single entry.