US 12,260,124 B2
Three-dimensional memory device and method for enhanced page register reset
Xiang Ming Zhi, Santa Clara, CA (US); and Augustus Tsai, Santa Clara, CA (US)
Assigned to YANGTZE MEMORY TECHNOLOGIES, INC., Santa Clara, CA (US)
Filed by YANGTZE MEMORY TECHNOLOGIES, INC., Santa Clara, CA (US)
Filed on Jan. 3, 2024, as Appl. No. 18/403,652.
Application 18/403,652 is a continuation of application No. 17/450,642, filed on Oct. 12, 2021, granted, now 11,983,439.
Application 17/450,642 is a continuation of application No. PCT/CN2021/083983, filed on Mar. 30, 2021.
Prior Publication US 2024/0134573 A1, Apr. 25, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 12/00 (2006.01); G06F 3/06 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for programming a memory device having a plurality of planes, comprising:
receiving program commands and addresses, wherein each of the addresses is associated with one of the program commands;
determining a first plane of the plurality of planes according to a first address of the addresses;
resetting a page register of the first plane according to the first address, the first address indicating a logical unit of the memory device corresponding to the plurality of planes comprising the first plane;
determining a second plane of the plurality of planes according to a second address of the addresses; and
resetting a page register of the second plane.