US 12,260,121 B2
Flash memory mechanism capable of storing and recording actual transmission history information of communication interface between flash memory controller and flash memory device
Tsu-Han Lu, Hsinchu (TW); and Hsiao-Chang Yen, Hsinchu County (TW)
Assigned to Silicon Motion, Inc., Hsinchu County (TW)
Filed by Silicon Motion, Inc., Hsinchu County (TW)
Filed on May 29, 2023, as Appl. No. 18/202,962.
Prior Publication US 2024/0402942 A1, Dec. 5, 2024
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/061 (2013.01); G06F 3/0679 (2013.01)] 28 Claims
OG exemplary drawing
 
1. A flash memory device to be used in a storage device and coupled to a flash memory controller of the storage device through a specific communication interface, comprising:
an input/output (I/O) control circuit, coupled to the flash memory controller through the specific communication interface;
a command register, coupled to the I/O control circuit, for buffering command information of a command signal sent from the flash memory controller and transmitted through the I/O control circuit;
an address register, coupled to the I/O control circuit, for buffering address information of the command signal sent from the flash memory controller and transmitted through the I/O control circuit;
a memory cell array, at least having a first plane and a second plane, wherein the second plane is different from the first plane;
at least one address decoder, coupled to the memory cell array; and
a control circuit having a specific buffer, coupled to the I/O control circuit, the memory cell array, the address register, and the command register, the control circuit being arranged to control the specific buffer storing a transmission history information of the specific communication interface, and the transmission history information comprises at least one of a data content and a data type of the command information buffered in the command register, a data content and a data type of the address information buffered in the address register, and a data type of a data input/output operation executed by the flash memory device.