| CPC G06F 3/0613 (2013.01) [G06F 3/0659 (2013.01); G06F 3/0673 (2013.01)] | 11 Claims |

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1. A processing-in-memory device, comprising:
a weight storage array including a plurality of weight storage cells, each of which includes a magnetic tunnel junction (MTJ) device having resistance determined depending on a magnetization direction and in each of which a first input signal having one of logic values depending on the resistance is applied through a bit line;
a product operation array including a plurality of product operation cells, each of which reads out the first input signal from at least one weight storage cell among the plurality of weight storage cells and performs a product operation of the first input signal and a second input signal applied through a voltage application line; and
a sum operation array including a plurality of sum operation cells, each of which reads out a result signal of a product operation from at least one product operation cell among the plurality of product operation cells and performs a sum operation on the result signal of the product operation, wherein the weight storage array, the product operation array, and the sum operation array are connected to each other through a calculation line to perform a multiply accumulation (MAC) operation.
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