US 12,259,903 B2
Data transfer with a bit vector operation device
Isom Crawford, Jr., Royse City, TX (US); Graham Kirsch, Tadley (GB); and John D. Leidel, McKinney, TX (US)
Filed by Lodestar Licensing Group LLC, Evanston, IL (US)
Filed on Nov. 13, 2023, as Appl. No. 18/507,914.
Application 18/507,914 is a continuation of application No. 17/199,261, filed on Mar. 11, 2021, granted, now 11,816,123.
Application 17/199,261 is a continuation of application No. 15/048,179, filed on Feb. 19, 2016, granted, now 10,956,439, issued on Mar. 23, 2021.
Prior Publication US 2024/0078247 A1, Mar. 7, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 16/25 (2019.01); H04L 67/1097 (2022.01)
CPC G06F 16/258 (2019.01) [H04L 67/1097 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
an array of memory cells;
a data transform engine (DTE) on a channel controller coupled to the array of memory cells, wherein the DTE is configured to:
receive first shape information indicating how data received at a bit vector operation device is stored;
transform data received at the bit vector operation device by rearranging the data, such that bits of the data are in a different order from an order in which the DTE received the bits of the data and corresponding to size and second shape information associated with the bits of data and source stream information associated with the bit vector operation device; and
the bit vector operation device configured to store the data as a bit vector in an order based on the first shape information, the source stream information, the rearranged data, size information, and the second shape information.