US 12,259,823 B2
Virtual memory management method and apparatus supporting physical addresses larger than virtual addresses
Weijie Chen, Beijing (CN)
Assigned to BEIJING ESWIN COMPUTING TECHNOLOGY CO., LTD., Beijing (CN)
Filed by Beijing ESWIN Computing Technology Co., Ltd., Beijing (CN)
Filed on Dec. 9, 2022, as Appl. No. 18/078,539.
Claims priority of application No. 202111509239.8 (CN), filed on Dec. 10, 2021.
Prior Publication US 2023/0289295 A1, Sep. 14, 2023
Int. Cl. G06F 12/1009 (2016.01); G06F 12/1027 (2016.01)
CPC G06F 12/1009 (2013.01) [G06F 12/1027 (2013.01); G06F 2212/657 (2013.01)] 11 Claims
OG exemplary drawing
 
10. An electronic device, comprising:
a processor; and
a memory, the memory and the processor being connected to each other;
the memory is configured to store computer programs, when executed, instructing the processor to:
determine a target virtual address corresponding to an instruction fetch address or a load storage address in any one of a user mode, a supervisor mode, or a machine mode;
determine a target physical address corresponding to the target virtual address by accessing a virtual memory management unit, wherein the virtual memory management unit stores page table entries that map virtual addresses to physical addresses, the bit width of the target virtual address is less than or equal to that of the target physical address; and
return the target physical address,
wherein the virtual memory management unit includes a first translation lookaside buffer and a second translation lookaside buffer, the first translation lookaside buffer stores page table entries that map virtual addresses to physical addresses within a preset time interval from the current time, and the second translation lookaside buffer stores page table entries that map all virtual addresses to physical addresses,
wherein in the machine mode, the determining a target physical address corresponding to the target virtual address by accessing a virtual memory management unit comprises:
acquiring a 47-bit to 39-bit extra physical address bit width provided by a configuration register;
transmitting the extra physical address bit width to the virtual memory management unit to construct, based on the extra physical address bit width, a mapping relationship between 0-bit to 47-bit virtual addresses and 0-bit to 47-bit physical addresses; and
determining, by accessing the virtual memory management unit and based on the mapping relationship between virtual addresses and physical addresses stored in the virtual memory management unit, the target physical address corresponding to the target virtual address.