US 12,259,818 B2
Flash memory controller and data programming method
Hsiao-chang Yen, Hsinchu (TW); and Tsu-han Lu, Hsinchu (TW)
Assigned to Silicon Motion Inc., Jhubei (TW)
Filed by Silicon Motion Inc., Hsinchu (TW)
Filed on Feb. 5, 2024, as Appl. No. 18/432,096.
Claims priority of application No. 112120776 (TW), filed on Jun. 2, 2023.
Prior Publication US 2024/0403221 A1, Dec. 5, 2024
Int. Cl. G06F 12/0877 (2016.01); G06F 12/02 (2006.01)
CPC G06F 12/0877 (2013.01) [G06F 12/0238 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A flash memory controller for controlling a flash memory, wherein the flash memory comprises a first chip-enable-signal controlled area, the flash memory controller comprises:
a control logic circuit coupled to the first chip-enable-signal controlled area of the flash memory through at least one channel to transmit data and commands; and
a processor coupled to the control logic circuit to access the first chip-enable-signal controlled area on the channel through the control logic circuit, wherein the processor controls the control logic circuit to transmit a program command sequence to the first chip-enable-signal controlled area through the channel; and
wherein the program command sequence comprises a first command and a second command, the first command is configured to instruct the first chip-enable-signal controlled area to write stored data and read operating temperature information, and in response to the transmission of the second command, the processor controls the control logic circuit to receive the operating temperature information from the first chip-enable-signal controlled area.