US 12,259,771 B2
Hand-held gaming system and method for configuring a hand-held gaming system
Suraj M. Varma, Portland, OR (US); Daniel L. Hamlin, Round Rock, TX (US); and Manuel Novoa, Leander, TX (US)
Assigned to Dell Products L.P., Round Rock, TX (US)
Filed by Dell Products L.P., Round Rock, TX (US)
Filed on Feb. 6, 2023, as Appl. No. 18/164,706.
Prior Publication US 2024/0264653 A1, Aug. 8, 2024
Int. Cl. G06F 1/3212 (2019.01); G06F 1/16 (2006.01); G06F 1/20 (2006.01); G06F 1/3234 (2019.01)
CPC G06F 1/3212 (2013.01) [G06F 1/1632 (2013.01); G06F 1/206 (2013.01); G06F 1/3243 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A method of configuring operation of a handheld device, the method comprising:
an embedded controller (EC) determining one of: the handheld device is coupled to a dock, is coupled to a power supply supplying constant power, or is receiving battery power from a battery;
a provided service stored in a memory medium in the handheld device determining a state of the handheld device by:
communicating with the EC to determine if the handheld device is docked, if the handheld device is operating on the constant power from the power supply or if the handheld device is operating on the battery power from the battery; and
determining if the handheld device is moving or is stationary; and
the provided service configuring the handheld device in one of an Ultra Performance Mode, an Optimized Mode, a Quiet Mode or a Peak Mode in response to determining the state of the handheld device,
wherein configuring the handheld device to operate in the Ultra Performance Mode comprises:
in response to receiving a signal from the EC indicating the handheld device is coupled to the dock, the provided service performs:
communicating a signal to enable thread processing on an integrated graphics processing unit (IGPU) in a processor;
communicating a signal to enable thread processing on a discrete graphics processing unit (DGPU);
communicating a signal to an operating system (OS) scheduler to schedule a set of regular threads on the IGPU and the DGPU; and
communicating a signal to the OS scheduler to schedule a set of short threads on the IGPU and the DGPU.