| CPC G06F 1/06 (2013.01) [G06F 1/14 (2013.01); H03L 7/0991 (2013.01); G06F 1/08 (2013.01)] | 5 Claims |
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1. A real-time clock module comprising:
an oscillation circuit configured to generate a first clock signal by oscillating a resonator;
a frequency divider circuit configured to receive the first clock signal and divide a first frequency of the first clock signal to generate a second clock signal having a second frequency;
a first counter that is a first binary counter, the first counter being configured to count a number of pulses of the second clock signal to:
generate a third clock signal having a third frequency based on a first count value corresponding to the counted number of pulses of the second clock signal; and
generate first clocking data representing a first time point unit, the first clocking data corresponding to the first count value;
a second counter that is a BCD counter, the second counter being configured to count a number of pulses of the third clock signal to:
generate a BCD count value; and
generate second clocking data representing a second time point unit, the second clocking data corresponding to the BCD count value;
a third counter that is a second binary counter, the third counter being configured to count a number of pulses of the third clock signal to:
generate a binary count value; and
generate third clocking data representing the second time point unit, the third clocking data corresponding to the binary count value;
an interface circuit configured to receive alarm setting data;
a memory configured to store the alarm setting data and a program; and
a processor configured to execute the program to:
generate BCD clocking data based on the second clocking data;
generate BIN clocking data based on the third clocking data;
perform a comparison process of comparing at least one of the BCD clocking data or the BIN clocking data with the alarm setting data; and
output an alarm signal according to a result of the comparison process.
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