US 12,259,742 B2
Low-dropout regulator
Huidong Gwon, Yongin-si (KR); Byongdeok Choi, Seoul (KR); Taehwang Kong, Suwon-si (KR); Junhyeok Yang, Seoul (KR); and Junhwan Jang, Seoul (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR); and IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION, Seoul (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Nov. 25, 2022, as Appl. No. 17/994,134.
Claims priority of application No. 10-2021-0170242 (KR), filed on Dec. 1, 2021.
Prior Publication US 2023/0170800 A1, Jun. 1, 2023
Int. Cl. G05F 1/59 (2006.01); G05F 1/575 (2006.01); H02M 3/157 (2006.01); H03M 1/06 (2006.01); H03M 1/44 (2006.01); H03M 1/50 (2006.01)
CPC G05F 1/59 (2013.01) [G05F 1/575 (2013.01); H03M 1/0607 (2013.01); H03M 1/44 (2013.01); H03M 1/502 (2013.01); H02M 3/157 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A low-dropout (LDO) regulator comprising:
a voltage-to-time converter configured to convert a fluctuation in an output voltage sensed from an output node of the LDO regulator into a time domain signal having a pulse type, and output the time domain signal, based on a clock signal;
a time-to-voltage converter configured to receive the time domain signal, convert the time domain signal into a first voltage control signal performing first compensation for the output voltage, and output the first voltage control signal;
an analog amplifier configured to output a second voltage control signal continuously performing second compensation for the output voltage, regardless of the clock signal; and
a first pass transistor connected between a power supply line and the output node, and configured to drive the output voltage based on the second voltage control signal,
wherein the LDO regulator is configured to reduce the fluctuation in the output voltage, based on the first compensation and the second compensation.