CPC H04N 19/31 (2014.11) | 5 Claims |
1. An encoder, comprising:
circuitry; and
memory coupled to the circuitry, wherein
the circuitry, in operation,
encodes identification information into a header of a bitstream including a plurality of sub-bitstreams respectively having mutually different frame rates, the identification information indicating a plurality of maximum temporal IDs which correspond to the plurality of sub-bitstreams, each of the plurality of maximum temporal IDs being a maximum identifier of one or more temporal layers related to a temporal scalability, and
for each of the plurality of sub-bitstreams, encodes level information indicating a conformance level of the sub-bitstream.
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