US 11,936,390 B2
Low-power fractional-N phase-locked loop circuit
Xiang Gao, Hangzhou (CN); Gaofeng Jin, Hangzhou (CN); and Fei Feng, Hangzhou (CN)
Assigned to ZHEJIANG UNIVERSITY, Hangzhou (CN)
Filed by ZHEJIANG UNIVERSITY, Zhejiang (CN)
Filed on Oct. 25, 2022, as Appl. No. 17/973,518.
Application 17/973,518 is a continuation of application No. PCT/CN2022/072209, filed on Jan. 17, 2022.
Claims priority of application No. 202110110734.5 (CN), filed on Jan. 27, 2021.
Prior Publication US 2023/0053266 A1, Feb. 16, 2023
Int. Cl. H03L 7/091 (2006.01); H03L 7/099 (2006.01); H03L 7/10 (2006.01)
CPC H03L 7/091 (2013.01) [H03L 7/0995 (2013.01); H03L 7/103 (2013.01)] 4 Claims
OG exemplary drawing
 
1. A low-power fractional-N phase-locked loop circuit, comprising a phase detector, a voltage-to-current converter, a loop filter, a voltage-controlled oscillator, a frequency divider and a digital logic processor; wherein the phase detector, the voltage-to-current converter, the loop filter, the voltage-controlled oscillator and the frequency divider are connected in sequence; a reference signal is input from the phase detector, the phase detector detects the phases error between the reference signal and a feedback signal with a quantization error output by the frequency divider, compensates a quantization phase error generated by fractional frequency division, and outputs a compensated phase detection result to the voltage-to-current converter;
wherein the quantization error generated by fractional frequency division is converted into a voltage domain through a digital domain or a current or a capacitance in the phase detector is directly adjusted to complete compensation of the quantization error; and
wherein the phase detector is a constant slope sampling circuit or a variable slope sampling circuit;
when the phase detector is a constant slope sampling circuit, the phase detector comprises a current source, a charging switch, a charging capacitor, a pre-charging switch, a digital-to-voltage converter, a holding switch and a holding capacitor, wherein the current source is connected with one end of the charging switch, the digital-to-voltage converter is connected with one end of the pre-charging switch, and one end of the holding capacitor is connected with one end of the holding switch; the other ends of the charging switch, the pre-charging switch and the holding switch are all connected with one end of the charging capacitor; the other ends of the charging capacitor and the holding capacitor are both grounded; the other end of the digital-to-voltage converter is connected with the digital logic processor; the digital-to-voltage converter outputs different voltages to adjust an initial voltage value of the charging capacitor to compensate the quantization error caused by fractional frequency division; a charging time of the current source for the charging capacitor is controlled to complete the phase comparison between the reference signal and the feedback signal; and
when the phase detector is a variable slope sampling circuit, the phase detector comprises a variable current source, a variable charging capacitor, a holding capacitor, a charging switch, a reset switch and a holding switch; wherein the variable current source is connected with one end of the charging switch, and the holding capacitor is connected with one end of the holding switch; the other ends of the charging switch, the holding switch and the reset switch are all connected with one end of the variable charging capacitor, and the other ends of the variable charging capacitor, the reset switch and the holding capacitor are all grounded; a slope of a charging ramp is changed by adjusting an output current of the variable current source or a size of the variable charging capacitor to compensate the quantization error caused by fractional frequency division; the charging time of the variable current source for the variable charging capacitor is controlled to complete the phase comparison between the reference signal and the feedback signal.