US 11,936,350 B2
Power amplifier circuit
Makoto Itou, Kyoto (JP); Satoshi Arayashiki, Kyoto (JP); and Satoshi Goto, Kyoto (JP)
Assigned to MURATA MANUFACTURING CO., LTD., Kyoto (JP)
Filed by Murata Manufacturing Co., Ltd., Kyoto (JP)
Filed on Jul. 13, 2021, as Appl. No. 17/374,065.
Claims priority of application No. 2020-120822 (JP), filed on Jul. 14, 2020.
Prior Publication US 2022/0021358 A1, Jan. 20, 2022
Int. Cl. H03F 3/24 (2006.01); H03F 1/02 (2006.01)
CPC H03F 3/245 (2013.01) [H03F 1/0211 (2013.01); H03F 2200/222 (2013.01); H03F 2200/451 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A power amplifier circuit comprising:
a first transistor having a first terminal to which a first signal is input, and a second terminal;
a second transistor having a first terminal to which the first signal is input, and a second terminal that is electrically connected to the second terminal of the first transistor;
a first resistor having a first end to which a first bias current is supplied, and a second end that is electrically connected to the first terminal of the first transistor;
a second resistor having a first end to which a second bias current is supplied, and a second end that is electrically connected to the first terminal of the second transistor; and
a third resistor having a first end that is electrically connected to the first end of the first resistor, and a second end that is electrically connected to the first end of the second resistor.