CPC H02M 3/1582 (2013.01) [H01L 21/84 (2013.01); H01L 29/0847 (2013.01); H01L 29/4232 (2013.01); H01L 29/66659 (2013.01); H01L 29/7835 (2013.01); H01L 29/7836 (2013.01); H01L 29/80 (2013.01); H01L 21/26586 (2013.01); H02M 3/158 (2013.01)] | 20 Claims |
1. A transistor comprising:
a gate structure over a substrate, wherein the substrate includes a channel region;
a source/drain (S/D) in the substrate adjacent to the gate structure;
a lightly doped drain (LDD) region adjacent to the S/D, wherein a dopant concentration in the LDD region is less than a dopant concentration in the S/D; and
a doping extension region adjacent the LDD region, wherein the doping extension region extends farther under the gate structure than the LDD region, and a maximum depth of the doping extension region is 10-times to 30-times greater than a maximum depth of the LDD.
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