US 11,935,585 B2
Pseudo multi-plane read methods and apparatus for non-volatile memory devices
Xiang Yang, Santa Clara, CA (US); Arka Ganguly, Scotts Valley, CA (US); and Ohwon Kwon, Pleasanton, CA (US)
Assigned to SanDisk Technologies LLC, Addison, TX (US)
Filed by SanDisk Technologies LLC, Addison, TX (US)
Filed on Oct. 25, 2021, as Appl. No. 17/509,725.
Prior Publication US 2023/0131500 A1, Apr. 27, 2023
Int. Cl. G11C 11/4096 (2006.01); G06F 3/06 (2006.01); G11C 11/4074 (2006.01); G11C 11/408 (2006.01)
CPC G11C 11/4096 (2013.01) [G06F 3/0613 (2013.01); G06F 3/064 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G11C 11/4074 (2013.01); G11C 11/4085 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a plurality of non-volatile memory cells arranged in a plane of a memory die, the plane comprising:
a first word line comprising a first word line portion coupled to a corresponding first group of the non-volatile memory cells;
a second word line comprising a second word line portion coupled to a corresponding second group of the non-volatile memory cells, the second word line different from the first word line; and
a control circuit configured to apply a first voltage to the first word line portion and apply a second voltage to the second word line portion to concurrently read the first group of the non-volatile memory cells and the second group of the non-volatile memory cells,
wherein the first group of the non-volatile memory cells and the second group of the non-volatile memory cells each store less than a page of data.