US 11,935,444 B2
Detection circuit, driving circuit, and display panel and driving method therefor
Jun Hong, Beijing (CN); Fei Xu, Beijing (CN); Jingyong Li, Beijing (CN); Yanbin Wang, Beijing (CN); Wenhong Tian, Beijing (CN); and Lei Gong, Beijing (CN)
Assigned to HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Anhui (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Appl. No. 18/016,688
Filed by Hefei BOE Optoelectronics Technology Co., Ltd., Anhui (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed Nov. 17, 2021, PCT No. PCT/CN2021/131318
§ 371(c)(1), (2) Date Jan. 18, 2023,
PCT Pub. No. WO2022/166303, PCT Pub. Date Aug. 11, 2022.
Claims priority of application No. 202110167917.0 (CN), filed on Feb. 7, 2021.
Prior Publication US 2023/0282141 A1, Sep. 7, 2023
Int. Cl. G09G 3/00 (2006.01); G09G 3/3233 (2016.01)
CPC G09G 3/006 (2013.01) [G09G 3/3233 (2013.01); G09G 2300/0842 (2013.01); G09G 2320/0242 (2013.01); G09G 2330/08 (2013.01); G09G 2330/12 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A detection circuit for a pixel circuit, wherein the pixel circuit comprises a driving transistor, and a pixel switching unit connected between a control end of the driving transistor and a data signal terminal, the data signal terminal being configured to provide a data signal; and the detection circuit comprises:
an acquisition circuit comprising a test transistor and an energy storage element, wherein a control end of the test transistor is configured to be coupled to the data signal terminal, a first end of the test transistor is configured to be written with a detection signal, and a second end of the test transistor is coupled to the energy storage element; and a structural characteristic of the test transistor is identical to a structural characteristic of the driving transistor; and
a processing circuit coupled to the second end of the test transistor, and configured to detect a voltage at the second end of the test transistor as a detection voltage and regulate the data signal according to the detection voltage;
wherein the acquisition circuit further comprises:
a first switching unit connected between the control end of the test transistor and the data signal terminal;
a second switching unit connected between the second end of the test transistor and the energy storage element; and
a third switching unit connected between the second end of the test transistor and the processing circuit.