US 11,934,862 B1
Physical memory management for virtual machines
Alexey Koryakin, Moscow (RU); and Nikolay Dobrovolskiy, Moscow (RU)
Assigned to Parallels International GmbH, Schaffhausen (CH)
Filed by PARALLELS INTERNATIONAL GMBH, Schaffhausen (CH)
Filed on Mar. 27, 2023, as Appl. No. 18/190,409.
Application 18/190,409 is a continuation of application No. 17/342,927, filed on Jun. 9, 2021, granted, now 11,625,262.
Application 17/342,927 is a continuation of application No. 16/553,411, filed on Aug. 28, 2019, granted, now 11,113,094, issued on Sep. 7, 2021.
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 9/455 (2018.01); G06F 9/38 (2018.01); G06F 9/48 (2006.01)
CPC G06F 9/45558 (2013.01) [G06F 9/3836 (2013.01); G06F 9/4843 (2013.01); G06F 2009/45575 (2013.01); G06F 2009/45583 (2013.01)] 8 Claims
OG exemplary drawing
 
1. A non-transitory memory storing computer instructions, the computer instructions executed by the one or more processors configure the one or more processors to:
inject a guest hardware interrupt into a virtual processor executing a first guest operating system (OS) process of a plurality of guest OS processes to switch the virtual processor to execute another guest OS process of the plurality of guest OS processes whilst the first guest OS process of the plurality of guest OS processes waits for data requested by a previous instruction or the current instruction to become available to the first guest OS process of the plurality of guest OS processes;
generate a first fault exception from the first guest OS process of the plurality of guest OS processes, the first fault exception associated with a page fault established in dependence upon a read request by the first guest OS process of the plurality of guest OS processes to read a page from a non-transitory memory storing data, the page having a virtual address within the first guest OS process of the plurality of guest OS processes and a physical address associated with the non-transitory memory;
execute an operating system kernel in dependence upon the first fault exception; and
generate a second fault exception from the first guest OS process of the plurality of guest OS processes;
handle the second fault exception through a virtualization event loop;
initiate an asynchronous memory allocation request from the virtualization event loop to an operating system of a computer system comprising a second microprocessor to allocate memory to store the page;
generate a synthetic interrupt from the virtualization event loop;
add the allocated memory into a virtual machine working set of a hypervisor or a virtual machine monitor;
map the virtual machine working set to a set of cache tables associated with the hypervisor or virtual machine monitor; and
restart the instruction associated with the first guest OS process of the plurality of guest OS processes which generated the second fault exception.