US 11,934,827 B2
Partition and isolation of a processing-in-memory (PIM) device
Sooraj Puthoor, Austin, TX (US); Muhammad Amber Hassaan, San Marcos, TX (US); Ashwin Aji, Santa Clara, CA (US); Michael L. Chu, Santa Clara, CA (US); and Nuwan Jayasena, Santa Clara, CA (US)
Assigned to ADVANCED MICRO DEVICES, INC., Santa Clara, CA (US)
Filed by ADVANCED MICRO DEVICES, INC., Santa Clara, CA (US)
Filed on Dec. 20, 2021, as Appl. No. 17/556,291.
Prior Publication US 2023/0195459 A1, Jun. 22, 2023
Int. Cl. G06F 9/30 (2018.01); G06F 7/575 (2006.01); G06F 9/38 (2018.01)
CPC G06F 9/3004 (2013.01) [G06F 7/575 (2013.01); G06F 9/3001 (2013.01); G06F 9/3856 (2023.08)] 20 Claims
OG exemplary drawing
 
1. An apparatus configured for managing multi-process execution in a processing-in-memory (PIM) device, the apparatus comprising a memory controller, the memory controller comprising logic configured to:
receive, from a first process, a memory request that includes a PIM command;
perform a context switch of a PIM state based on the first process being a registered PIM process and a second process being a registered PIM process and being active on the PIM device; and
issue the PIM command of the first process to the PIM device.