CPC G06F 1/06 (2013.01) [G01R 31/31727 (2013.01); H04B 1/401 (2013.01)] | 29 Claims |
1. An integrated circuit (IC), comprising:
a first set of test clock controllers (TCCs) including a first set of clock outputs, respectively, wherein the first set of TCCs comprises:
a first set of clock inputs configured to receive a set of at-speed clocks, respectively,
a second set of clock inputs configured to receive a first shift test clock, and
a first set of functional/test interfaces configured to receive control signals indicating a mode of operation, respectively; and
a first set of functional cores including a first set of clock inputs coupled to the first set of clock outputs of the first set of TCCs, respectively.
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