US 12,256,611 B2
Display substrate and display device
Haigang Qing, Beijing (CN); and Yunsheng Xiao, Beijing (CN)
Assigned to CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Sichuan (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Appl. No. 17/417,723
Filed by CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Sichuan (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
PCT Filed Nov. 4, 2020, PCT No. PCT/CN2020/126418
§ 371(c)(1), (2) Date Jun. 23, 2021,
PCT Pub. No. WO2021/098508, PCT Pub. Date May 27, 2021.
Claims priority of application No. 201911155559.0 (CN), filed on Nov. 22, 2019; and application No. 202011202265.1 (CN), filed on Nov. 2, 2020.
Prior Publication US 2022/0077273 A1, Mar. 10, 2022
Int. Cl. H10K 59/131 (2023.01); G09G 3/00 (2006.01); H01L 27/02 (2006.01); H10K 59/121 (2023.01); H10K 59/35 (2023.01)
CPC H10K 59/131 (2023.02) [G09G 3/006 (2013.01); H01L 27/0248 (2013.01); H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 59/353 (2023.02)] 19 Claims
OG exemplary drawing
 
1. A display substrate, comprising:
a base substrate comprising a display area and a peripheral area on at least one side of the display area;
a plurality of sub-pixels in the display area;
a plurality of data lines that is in the display area, is electrically connected to the plurality of sub-pixels, and is configured to provide data signals to the plurality of sub-pixels;
a test circuit in the peripheral area;
a plurality of data leads that is in the peripheral area and is electrically connected to the plurality of data lines and the test circuit;
at least one test pad in the peripheral area and on at least one side of the test circuit; and
at least one first test signal line in the peripheral area, wherein the at least one first test signal line is electrically connected to the at least one test pad and the test circuit,
wherein, at least a part of the at least one first test signal line comprises at least two conductive layers that are connected in parallel and electrically connected to each other,
wherein the test circuit comprises a plurality of test units, and at least one of the plurality of test units comprises a first multiplexing switch, a second multiplexing switch, a third multiplexing switch, a first control line, a second control line, a third control line, a first signal line, a second signal line and a third signal line;
wherein the display substrate further comprises a plurality of test pad leads, the at least one first test signal line comprises a plurality of first test signal lines, and the at least one test pad comprises a plurality of test pads;
the plurality of test pad leads extends along a second direction different from the first direction, and is electrically connected to the plurality of test pads, respectively;
wherein the display substrate further comprises:
at least one first electrostatic discharge unit, wherein the at least one first electrostatic discharge unit is on a side of the plurality of test pads close to the display area, and at least part of the plurality of test pad leads passes through the at least one first electrostatic discharge unit, and is connected to the at least one first electrostatic discharge unit;
or,
at least one second electrostatic discharge unit and at least one electrostatic lead located in the peripheral area, wherein the at least one second electrostatic discharge unit is located between the plurality of test pads and the first bonding area in the first direction, and the at least one electrostatic lead extends in the second direction, and is respectively electrically connected to at least one of the plurality of first test signal lines and the at least one second electrostatic discharge unit.