US 12,256,585 B2
Thin film transistor and method of manufacturing the same and thin film transistor panel and electronic device
Joo Young Kim, Hwaseong-si (KR); Byong Gwon Song, Seoul (KR); Jeong Il Park, Seongnam-si (KR); and Jiyoung Jung, Seoul (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Feb. 18, 2022, as Appl. No. 17/675,387.
Application 17/675,387 is a division of application No. 16/203,831, filed on Nov. 29, 2018, granted, now 11,296,289.
Claims priority of application No. 10-2018-0063719 (KR), filed on Jun. 1, 2018.
Prior Publication US 2022/0190266 A1, Jun. 16, 2022
Int. Cl. H10K 10/46 (2023.01); H01L 29/423 (2006.01); H10K 10/84 (2023.01); H10K 19/10 (2023.01); H10K 71/20 (2023.01); H10K 85/60 (2023.01)
CPC H10K 10/468 (2023.02) [H01L 29/42384 (2013.01); H10K 10/466 (2023.02); H10K 10/484 (2023.02); H10K 10/488 (2023.02); H10K 10/84 (2023.02); H10K 19/10 (2023.02); H10K 71/233 (2023.02); H10K 85/6576 (2023.02)] 16 Claims
OG exemplary drawing
 
1. A method of manufacturing a thin film transistor, comprising
forming a gate electrode,
forming a gate insulating layer, the gate insulating layer having a plurality of recess portions at a surface of the gate insulating layer,
forming a semiconductor layer connected to the surface of the gate insulating layer such that the gate insulating layer extends between the semiconductor layer and the gate electrode, the semiconductor layer having holes,
forming a source electrode and a drain electrode connected to the semiconductor layer, and
wherein each of the holes in the semiconductor layer extends through an entire thickness of the semiconductor layer to expose a lower surface of a corresponding one of the plurality of recess portions at the surface of the gate insulating layer.
 
7. A method of manufacturing a thin film transistor, comprising
forming a gate electrode,
forming a gate insulating layer, the gate insulating layer having a plurality of recess portions at a surface of the gate insulating layer,
forming a semiconductor layer connected to the surface of the gate insulating layer such that the gate insulating layer extends between the semiconductor layer and the gate electrode, the semiconductor layer having holes corresponding to the plurality of recess portions of the gate insulating layer, and
forming a source electrode and a drain electrode connected to the semiconductor layer,
wherein the forming the semiconductor layer includes depositing or coating a semiconductor material on the surface of the gate insulating layer having the recess portions, and
the semiconductor material is selectively deposited or coated on the surface of the gate insulating layer except for the recess portions.
 
11. A method of manufacturing a thin film transistor, comprising
forming a gate electrode,
forming a gate insulating layer, the gate insulating layer having a plurality of recess portions at a surface of the gate insulating layer, the gate insulating layer including a first region and a second region, the plurality of recess portions being in the first region,
forming a semiconductor layer connected to the surface of the gate insulating layer such that the gate insulating layer extends between the semiconductor layer and the gate electrode, the semiconductor layer having a plurality of holes, the semiconductor layer being formed on the first region of the gate insulating layer such that the first region is overlapped with the semiconductor layer and the second region is not overlapped with the semiconductor layer, and
forming a source electrode and a drain electrode connected to the semiconductor layer,
wherein the plurality of holes in semiconductor layer are in a portion of the semiconductor layer between the source electrode and the drain electrode in a plan view, and
wherein each of the plurality of holes in the semiconductor layer extends through an entire thickness of the semiconductor layer to expose a lower surface of a corresponding one of the plurality of recess portions in the gate insulating layer.