CPC H10D 89/711 (2025.01) [H10D 10/00 (2025.01)] | 20 Claims |
1. A transistor comprising:
a P-type well, a body terminal region, and a source region, wherein the body terminal region and the source region are arranged in the P-type well, and the body terminal region is adjacent to the source region;
a first metal silicide layer arranged on surfaces of the body terminal region and the source region, and electrically connected to the body terminal region and the source region separately; and
a first metal and a plurality of first contact structures, wherein:
the first metal is electrically connected, through the plurality of first contact structures, only to a first portion of the first metal silicide layer that is located on a surface of the body terminal region to generate a resistance between an emitter of a parasitic bipolar transistor of the transistor and the body terminal region, or
the first metal is electrically connected, through the plurality of first contact structures, only to a second portion of the first metal silicide layer located on a surface of the source region to generate a resistance between a base of the parasitic bipolar transistor of the transistor and the source region; and
wherein a PN junction between the base and the emitter of the parasitic bipolar transistor is located between the P-type well and the source region; and
wherein the body terminal region and the source region extend continuously alongside each other.
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