| CPC H10D 62/111 (2025.01) [H10D 30/665 (2025.01); H10D 62/127 (2025.01); H10D 62/393 (2025.01)] | 13 Claims |
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1. A superjunction semiconductor device, comprising:
a substrate;
a drain electrode under the substrate;
an epitaxial layer on the substrate;
a plurality of pillars spaced apart from each other in the epitaxial layer;
a first body region in the epitaxial layer, connected to an upper portion of one of the plurality of pillars and having a longitudinal direction and a cross-direction in a plan view thereof;
a source in the first body region;
a core region providing a current path in a channel between the source and the drain when a gate-source voltage is applied and having a length along the longitudinal direction; and
edge regions at opposite ends of the core region along the longitudinal direction, wherein each of the edge regions functions as a termination region for the channel, and the first body region is in the core region and the edge regions,
wherein the source is in a portion of the core region,
the source comprises two source regions spaced apart from each other along the cross-direction in the first body region, and
each of the source regions is in a center portion of the body region along the longitudinal direction, but not in either of opposite ends of the first body region in the core region between each of the edge regions and the center portion of the first body region, and the opposite ends of the first body region not containing the source regions have a total or cumulative length in the longitudinal direction equal to or higher than 50% and less than or equal to 85% of the length of the core region.
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