US 12,256,561 B2
SiC MOSFET device and method for manufacturing the same
Dajie Zeng, Guangdong (CN); and Rong Jiang, Guangdong (CN)
Assigned to Shenzhen Sanrise-Tech Co., LTD, Guangdong (CN)
Filed by Shenzhen Sanrise-Tech Co., LTD, Guangdong (CN)
Filed on Nov. 30, 2021, as Appl. No. 17/538,348.
Claims priority of application No. 202011465374.2 (CN), filed on Dec. 14, 2020.
Prior Publication US 2022/0190104 A1, Jun. 16, 2022
Int. Cl. H10D 62/10 (2025.01); H01L 21/04 (2006.01); H01L 21/76 (2006.01); H01L 21/761 (2006.01); H10D 12/01 (2025.01); H10D 30/66 (2025.01); H10D 62/17 (2025.01); H10D 62/832 (2025.01)
CPC H10D 62/109 (2025.01) [H01L 21/0465 (2013.01); H01L 21/049 (2013.01); H01L 21/7602 (2013.01); H01L 21/761 (2013.01); H10D 12/031 (2025.01); H10D 30/668 (2025.01); H10D 62/393 (2025.01); H10D 62/8325 (2025.01)] 16 Claims
OG exemplary drawing
 
1. An SiC MOSFET device, wherein a device unit comprises:
an SiC epitaxial layer of a first conductive type doping, wherein a trench gate is formed in the SiC epitaxial layer;
the trench gate comprises a gate trench, a gate dielectric layer formed on an inner side surface of the gate trench, and a gate conductive material layer filled in the gate trench;
a first bottom doped region is formed in the SiC epitaxial layer below a bottom surface of the gate trench, the first bottom doped region is of a second conductive type doping, and a top surface of the first bottom doped region is in contact with a bottom surface of the gate dielectric layer on the bottom surface of the gate trench;
a channel region of the second conductive type doping is formed in the SiC epitaxial layer, the channel region extends downwards from a top surface of the SiC epitaxial layer, the gate conductive material layer longitudinally passes through the channel region;
a second deep doped region of the second conductive type doping is formed in the SiC epitaxial layer, and there is spacing between the second deep doped region and the gate trench;
a source region consisting of a region of first conductive type heavy doping is formed on a surface of the channel region;
a top of the gate conductive material layer is connected to a gate consisting of a front metal layer;
a top of the source region is connected to a source consisting of a front metal layer;
the first bottom doped region is connected to the source;
the second deep doped region extends downwards from the top surface of the SiC epitaxial layer, and a bottom surface of the second deep doped region is located below a bottom surface of the first bottom doped region;
a top of the second deep doped region is connected to the source;
the SiC epitaxial layer at a bottom of the channel region forms a drift region; and
the SiC epitaxial layer is composed of multiple layers of SiC epitaxial sub-layers, each of which is stacked together vertically, a deep doped sub-region is formed in each of the SiC epitaxial sub-layers, and the deep doped sub-regions are stacked together vertically, and the second deep doped region is composed of the deep doped sub-regions in each layer.