US 12,256,554 B2
Embedded MRAM integrated with super via and dummy fill
Ruilong Xie, Niskayuna, NY (US); Kangguo Cheng, Schenectady, NY (US); Dimitri Houssameddine, Sunnyvale, CA (US); and Julien Frougier, Albany, NY (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by International Business Machines Corporation, Armonk, NY (US)
Filed on Sep. 27, 2021, as Appl. No. 17/485,768.
Prior Publication US 2023/0098033 A1, Mar. 30, 2023
Int. Cl. H10B 61/00 (2023.01); H10N 50/01 (2023.01); H10N 50/80 (2023.01)
CPC H10B 61/00 (2023.02) [H10N 50/01 (2023.02); H10N 50/80 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A device comprising:
a plurality of magnetic random-access memory (MRAM) cells in a first region of the device;
a dummy MRAM pillar disposed in a second region of the device,
wherein the dummy MRAM pillar is not connected to an active metal feature;
a super via disposed in a third region of the device with a sidewall spacer on a sidewall of the super via; and
a residual portion of a sacrificial MRAM stack disposed between the super via and the sidewall spacer.