US 12,256,528 B2
Compact static random-access memory structure
Ruey-Wen Chang, Hsinchu (TW); Feng-Ming Chang, Hsinchu County (TW); and Ping-Wei Wang, Hsin-Chu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Aug. 30, 2021, as Appl. No. 17/461,426.
Prior Publication US 2023/0068359 A1, Mar. 2, 2023
Int. Cl. H10B 10/00 (2023.01); G11C 11/412 (2006.01); H01L 27/092 (2006.01)
CPC H10B 10/12 (2023.02) [G11C 11/412 (2013.01); H01L 27/0924 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A static random-access memory (SRAM) structure comprising:
a first source/drain (S/D) feature and a second S/D feature formed in an interlayer dielectric layer (ILD) of a bit cell region of the SRAM structure, wherein the first S/D feature and the second S/D feature are of a same type;
a frontside via electrically connecting to the first S/D feature;
a first backside via electrically connecting to the second S/D feature; and
a third S/D feature formed in the ILD, wherein the third S/D feature is of a type different than the type of the first and the second S/D features.