US 12,256,500 B2
Circuit board and manufacturing method therefor
Jin Han Lee, Cheongju-si (KR); Sung Jin Lee, Cheongju-si (KR); and Jin Ho Kim, Cheongju-si (KR)
Assigned to STEMCO CO., LTD., Cheongju-si (KR)
Appl. No. 17/753,169
Filed by STEMCO CO., LTD., Cheongju-si (KR)
PCT Filed Jul. 31, 2020, PCT No. PCT/KR2020/010136
§ 371(c)(1), (2) Date Feb. 22, 2022,
PCT Pub. No. WO2021/033951, PCT Pub. Date Feb. 25, 2021.
Claims priority of application No. 10-2019-0102852 (KR), filed on Aug. 22, 2019.
Prior Publication US 2022/0287185 A1, Sep. 8, 2022
Int. Cl. H05K 1/18 (2006.01); H05K 1/11 (2006.01); H05K 3/28 (2006.01)
CPC H05K 3/282 (2013.01) [H05K 1/111 (2013.01); H05K 1/18 (2013.01); H05K 2201/10674 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A circuit board comprising:
a base substrate in which a protective layer formation region is defined;
a wiring pattern which is formed on the base substrate and which has at least a portion formed in the protective layer formation region;
a protective layer fixed onto the protective layer formation region and formed of a protective material; and
a bleed prevention pattern formed on the base substrate so as to prevent the protective material from flowing beyond the protective layer formation region when the protective layer is formed,
wherein an inner lead region in which a chip is mounted is additionally defined in the base substrate,
wherein the bleed prevention pattern is formed in an area outside the inner lead region, adjacent to a corner of a boundary of the inner lead region where the wiring pattern is not formed, and within the protective layer formation region, and comprises a dam that is configured to physically block a flow of the protective material and prevent the protective material from flowing into the inner lead region when forming the protective layer.